DVB-S2 Demodulator IP Core

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Modulator/Demodulator


The DVB-S2 Demodulator IP Core is a complete BPSK/QPSK/8-PSK/16-APSK/32-APSK tuner with integrated DVB-S2 LDPC/BCH FEC Decoder. The IP Core includes digital receiver, LLR decision slicer, LDPC decoder, deinterleaver, BCH decoder, descrambler and TS stream output FIFO.



Version : 0.5
Build date : 2015.06
Ordering code : ip-dvb-s2-demodulator
Supported technologies : FPGA (Xilinx, Intel/Altera, Lattice, Microsemi/Actel)

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