DVB-S2X Demodulator IP Core

Request preliminary version



Modulator/Demodulator


The DVB-S2X Demodulator IP Core is a complete 64-APSK/128-APSK/256-APSK tuner with integrated DVB-S2X LDPC/BCH FEC Decoder. The IP Core includes digital receiver, LLR decision slicer, LDPC decoder, deinterleaver, BCH decoder, descrambler and TS stream output FIFO.



Version : 0.5
Build date : 2015.06
Ordering code : ip-dvb-s2x-demodulator
Supported technologies : FPGA (Xilinx, Intel/Altera, Lattice, Microsemi/Actel)

return